Using zones to manage capacity reduction due to storage device failure

ABSTRACT

A system and method for managing a reduction in capacity of a memory sub-system. An example method involving a memory sub-system: configuring the memory device with a zoned namespace comprising a plurality of zones; notifying a host system of a failure associated with a zone of the plurality of zones, wherein the failure affects stored data; receiving from the host system an indication to continue at a capacity that is reduced; recovering the stored data of the zone affected by the failure; and updating the set of memory devices to change the capacity to a reduced capacity.

TECHNICAL FIELD

Embodiments of the disclosure relate generally to memory sub-systems,and more specifically, relate to managing capacity reductions to memorysub-systems.

BACKGROUND

A memory sub-system can include one or more memory devices that storedata. The memory devices can be, for example, non-volatile memorydevices and volatile memory devices. In general, a host system canutilize a memory sub-system to store data on the memory devices and toretrieve data from the memory devices.

BRIEF DESCRIPTION OF THE DRAWINGS

The disclosure will be understood more fully from the detaileddescription given below and from the accompanying drawings of variousembodiments of the disclosure. The drawings, however, should not betaken to limit the disclosure to the specific embodiments, but are forexplanation and understanding only.

FIG. 1 illustrates an example computing system that includes a hostsystem and a memory sub-system, in accordance with some embodiments ofthe present disclosure.

FIG. 2 is a detailed block diagram of the host system and the memorysub-system of FIG. 1, in accordance with some embodiments of the presentdisclosure.

FIG. 3 is a block diagram of a memory sub-system that includes a zonednamespace with multiple zones, in accordance with some embodiments ofthe present disclosure.

FIG. 4 is a detailed block diagram of a memory sub-system, in accordancewith some embodiments of the present disclosure.

FIG. 5 is a detailed block diagram of a host system, in accordance withsome embodiments of the present disclosure.

FIG. 6 is a flow chart of a method executed by the memory sub-system tomanage a reduction of capacity, in accordance with some embodiments ofthe present disclosure.

FIG. 7 is a flow chart of another method executed by the memorysub-system to manage a reduction of capacity, in accordance with someembodiments of the present disclosure.

FIG. 8 is a flow chart of another method executed by the memorysub-system to manage a reduction of capacity, in accordance with someembodiments of the present disclosure.

FIG. 9 is a flow chart of another method executed by the memorysub-system to manage a reduction of capacity, in accordance with someembodiments of the present disclosure.

FIG. 10 is a flow chart of a method executed by the host system tomanage the reduction of capacity of the memory sub-system, in accordancewith some embodiments of the present disclosure.

FIG. 11 is a flow chart of another method executed by the host system tomanage the reduction of capacity of the memory sub-system, in accordancewith some embodiments of the present disclosure.

FIG. 12 is a block diagram of an example computer system in whichembodiments of the present disclosure can operate.

DETAILED DESCRIPTION

Aspects of the present disclosure enable a host system and memorysub-system to manage failures by remaining operational at a reducedcapacity. The memory sub-system can be a storage device, a memorymodule, or a combination of a storage device and memory module. Examplesof storage devices and memory modules are described below in conjunctionwith FIG. 1. In general, the host system can utilize a memory sub-systemthat includes one or more memory devices that store data. The hostsystem can provide data to be stored at the memory sub-system and canrequest data to be retrieved from the memory sub-system.

A memory sub-system can be susceptible to failures that reduce thecapacity of the memory sub-system and adversely affect the host system.For example, the memory sub-system can include multiple memory devicesand one or more of the memory devices can fail and reduce the capacityof the memory sub-system. In the past, the memory sub-system would bereplaced when one of the memory devices failed. Modern memorysub-systems can include many memory devices (e.g., 256 dies) and canstore large amounts of data (e.g., 128 terabytes). A failure of a singlememory device means that there are many other memory devices that arestill functioning. Replacing the memory sub-system that has functioningmemory devices wastes the remaining memory devices and often requiresrelocating large amounts of data.

Modern memory sub-systems often provide fault tolerance that handlesfailures in a manner that is transparent to the host system. The memorysub-systems are manufactured with a storage size and a first portion ofthe storage size is made available to the host system, while a secondportion can be reserved for internal use (e.g., over provisioning orredundancy). The first portion of the storage size that is available tothe host system is referred to as the storage capacity. When a failureoccurs that reduces the total amount of storage, the memory sub-systemcan reduce the size of the second portion set aside for internal use sothat the size of the first portion available to the host remains thesame (e.g., the storage capacity is unchanged). This can be performedtransparent to the host system because the memory sub-system can recoverdata stored on a failed memory device and store it at another locationthat can be made available to the host system. This type of transparentfault tolerance can be limited in the types of failures it handles andthe amount of storage loss it can sustain, and although it can retainthe storage capacity, it can adversely affect the performance orreliability of the memory sub-system.

Aspects of the present disclosure address the above and otherdeficiencies by enabling a host system and a memory sub-system to managea reduction in the capacity of the memory sub-system. In one embodiment,the memory sub-system can detect a failure in the memory sub-system thataffects the storage capacity available to the host system. The memorysub-system can include a set of memory devices and the failure canaffect any portion of the memory sub-system and affect access to datastored on one or more of the memory devices in the set. In one example,one or more of the memory devices can fail (e.g., die failure, planefailure) or can become inaccessible (e.g., channel or connectorfailure). In another example, the memory device can store more than onebit of information per memory cell (e.g., 4 bits per cell) and thememory device can fail to function as expected and can be downshifted tostore less bits of information per memory cell (e.g. 3 bits per cellinstead of 4 bits per cell). In either of these examples, the failurecan result in a reduction to the storage capacity and the memorysub-system can communicate with the host system to manage the reductionin capacity of the memory sub-system. For example, the memory sub-systemcan notify the host system that a failure occurred and indicate theamount of storage that was affected, the remaining capacity, or acombination thereof. The host system can acknowledge the failure andindicate whether or not the memory sub-system should be updated tooperate at a reduced capacity. The update can preserve data that was notaffected by the failure, recover data affected by the failure, relocatedata internal or external to the memory sub-system, or a combinationthereof.

Advantages of the present disclosure include but are not limited toenhancing the efficiency, duration, and use of memory sub-systems. Inparticular, the technology can be advantageous because it enables amemory sub-systems to remain in use for a longer duration before beingreplaced and therefore decreases the total cost of ownership (TCO). Inone example, each time one of the memory devices fail (e.g., a NAND diefails), the memory sub-system can update its configuration to operate ata lower capacity using the remaining memory devices. This updating canoccur repeatedly and in response to each failure until the last memorydevice fails. This enables the memory sub-systems to sustain multiplefailures over time and remain in operation for a longer duration beforebeing replaced. Other advantages include enabling a memory sub-system toreduce the capacity while retaining reliability, performance, andefficiency of the memory sub-system. As discussed above, a memorysub-system can keep the capacity constant in response to a failure bytaking a portion of storage used for internal use and making thatportion available to the host system. The portion taken could have beenused for over provisioning or redundancy and its removal can reduce theperformance, reliability, or efficiency of the memory sub-system.Additional advantages include enabling the host system and memorysub-system to reduce the capacity of the memory sub-system withoutminimizing the storage used for internal use. The technology disclosedherein can also enable the host system and memory sub-system to preservedata when the capacity is reduced. Host systems often handle a reductionin capacity by reformatting the memory sub-system, which deletes data onthe memory sub-system. Prior to reformatting, the host system copiesdata of the memory sub-system to temporary storage and then copies,recovers, corrects, or otherwise recreates the data back onto the memorysub-system after the reformatting. The technology disclosed hereinreduces or avoids the computational resources consumed by the copying(e.g., processor cycles, I/O, temporary storage space) by preservingdata that was not affected by the failure and in some examples byrecovering some or all of the data affected by the failure. Otheradvantages will be apparent to those skilled in the art of data storageand memory devices as discussed hereinafter.

FIG. 1 illustrates an example computing system 100 that includes amemory sub-system 110 and a host system 120 in accordance with someembodiments of the present disclosure. The memory sub-system 110 caninclude media, such as one or more non-volatile memory devices (e.g.,memory device 130), one or more volatile memory devices (e.g., memorydevice 140), or a combination of such. Each memory device 130 or 140 canbe one or more memory component(s).

A memory sub-system 110 can be a storage device, a memory module, or acombination of a storage device and memory module. Examples of a storagedevice include a solid-state drive (SSD), a flash drive, a universalserial bus (USB) flash drive, an embedded Multi-Media Controller (eMMC)drive, a Universal Flash Storage (UFS) drive, a secure digital (SD)card, and a hard disk drive (HDD). Examples of memory modules include adual in-line memory module (DIMM), a small outline DIMM (SO-DIMM), andvarious types of non-volatile dual in-line memory module (NVDIMM).

The computing system 100 can be a computing device such as a desktopcomputer, laptop computer, network server, mobile device, a vehicle(e.g., airplane, drone, train, automobile, or other conveyance),Internet of Things (IoT) enabled device, embedded computer (e.g., oneincluded in a vehicle, industrial equipment, or a networked commercialdevice), or such computing device that includes memory and a processingdevice.

The computing system 100 can include a host system 120 that is coupledto one or more memory sub-systems 110. In some embodiments, the hostsystem 120 is coupled to different types of memory sub-system 110. FIG.1 illustrates one example of a host system 120 coupled to one memorysub-system 110. As used herein, “coupled to” or “coupled with” generallyrefers to a connection between components or devices, which can be anindirect communicative connection or direct communicative connection(e.g., without intervening components or devices), whether wired orwireless, including connections such as electrical, optical, magnetic,and the like.

The host system 120 can include a processor chipset and a software stackexecuted by the processor chipset. The processor chipset can include oneor more cores, one or more caches, a memory controller (e.g., NVDIMMcontroller), and a storage protocol controller (e.g., PCIe controller,SATA controller). The host system 120 uses the memory sub-system 110,for example, to write data to the memory sub-system 110 and read datafrom the memory sub-system 110.

The host system 120 can be coupled to the memory sub-system 110 via aphysical host interface, which can communicate over a system bus.Examples of a physical host interface include, but are not limited to, aserial advanced technology attachment (SATA) interface, a peripheralcomponent interconnect express (PCIe) interface, universal serial bus(USB) interface, Fibre Channel, Serial Attached SCSI (SAS), a doubledata rate (DDR) memory bus, Small Computer System Interface (SCSI), adual in-line memory module (DIMM) interface (e.g., DIMM socket interfacethat supports Double Data Rate (DDR)), Open NAND Flash Interface (ONFI),Double Data Rate (DDR), Low Power Double Data Rate (LPDDR), or any otherinterface. The physical host interface can be used to transmit databetween the host system 120 and the memory sub-system 110. The hostsystem 120 can further utilize an NVM Express (NVMe) interface to accesscomponents (e.g., memory devices 130) when the memory sub-system 110 iscoupled with the host system 120 by the physical host interface (e.g.,PCIe bus). The physical host interface can provide an interface forpassing control, address, data, and other signals between the memorysub-system 110 and the host system 120. FIG. 1 illustrates a memorysub-system 110 as an example. In general, the host system 120 can accessmultiple memory sub-systems via a same communication connection,multiple separate communication connections, and/or a combination ofcommunication connections.

The memory devices 130, 140 can include any combination of the differenttypes of non-volatile memory devices and/or volatile memory devices. Thevolatile memory devices (e.g., memory device 140) can be, but are notlimited to, random access memory (RAM), such as dynamic random accessmemory (DRAM) and synchronous dynamic random access memory (SDRAM).

Some examples of non-volatile memory devices (e.g., memory device 130)include negative-and (NAND) type flash memory and write-in-place memory,such as three-dimensional cross-point (“3D cross-point”) memory. Across-point array of non-volatile memory can perform bit storage basedon a change of bulk resistance, in conjunction with a stackablecross-gridded data access array. Additionally, in contrast to manyflash-based memories, cross-point non-volatile memory can perform awrite in-place operation, where a non-volatile memory cell can beprogrammed without the non-volatile memory cell being previously erased.NAND type flash memory includes, for example, two-dimensional NAND (2DNAND) and three-dimensional NAND (3D NAND).

Each of the memory devices 130 can include one or more arrays of memorycells. One type of memory cell, for example, single level cells (SLC)can store one bit per cell. Other types of memory cells, such asmulti-level cells (MLCs), triple level cells (TLCs), quad-level cells(QLCs), and penta-level cells (PLCs) can store multiple bits per cell.In some embodiments, each of the memory devices 130 can include one ormore arrays of memory cells such as SLCs, MLCs, TLCs, QLCs, PLCs or anycombination of such. In some embodiments, a particular memory device caninclude an SLC portion, and an MLC portion, a TLC portion, a QLCportion, or a PLC portion of memory cells. The memory cells of thememory devices 130 can be grouped as pages that can refer to a logicalunit of the memory device used to store data. With some types of memory(e.g., NAND), pages can be grouped to form blocks.

Although non-volatile memory components such as NAND type flash memory(e.g., 2D NAND, 3D NAND) and 3D cross-point array of non-volatile memorycells are described, the memory device 130 can be based on any othertype of non-volatile memory, such as read-only memory (ROM), phasechange memory (PCM), self-selecting memory, other chalcogenide basedmemories, ferroelectric transistor random-access memory (FeTRAM),ferroelectric random access memory (FeRAM), magneto random access memory(MRAM), Spin Transfer Torque (STT)-MRAM, conductive bridging RAM(CBRAM), resistive random access memory (RRAM), oxide based RRAM(OxRAM), negative-or (NOR) flash memory, and electrically erasableprogrammable read-only memory (EEPROM).

A memory sub-system controller 115 (or controller 115 for simplicity)can communicate with the memory devices 130 to perform operations suchas reading data, writing data, or erasing data at the memory devices 130and other such operations. The memory sub-system controller 115 caninclude hardware such as one or more integrated circuits and/or discretecomponents, a buffer memory, or a combination thereof. The hardware caninclude a digital circuitry with dedicated (i.e., hard-coded) logic toperform the operations described herein. The memory sub-systemcontroller 115 can be a microcontroller, special purpose logic circuitry(e.g., a field programmable gate array (FPGA), an application specificintegrated circuit (ASIC), etc.), or other suitable processor.

The memory sub-system controller 115 can include a processing device,which includes one or more processors (e.g., processor 117) configuredto execute instructions stored in a local memory 119. In the illustratedexample, the local memory 119 of the memory sub-system controller 115includes an embedded memory configured to store instructions forperforming various processes, operations, logic flows, and routines thatcontrol operation of the memory sub-system 110, including handlingcommunications between the memory sub-system 110 and the host system120.

In some embodiments, the local memory 119 can include memory registersstoring memory pointers, fetched data, etc. The local memory 119 canalso include read-only memory (ROM) for storing micro-code. While theexample memory sub-system 110 in FIG. 1 has been illustrated asincluding the memory sub-system controller 115, in another embodiment ofthe present disclosure, a memory sub-system 110 does not include amemory sub-system controller 115, and can instead rely upon externalcontrol (e.g., provided by an external host, or by a processor orcontroller separate from the memory sub-system).

In general, the memory sub-system controller 115 can receive commands oroperations from the host system 120 and can convert the commands oroperations into instructions or appropriate commands to achieve thedesired access to the memory devices 130. The memory sub-systemcontroller 115 can be responsible for other operations such as wearleveling operations, garbage collection operations, error detection anderror-correcting code (ECC) operations, encryption operations, cachingoperations, and address translations between a logical block address(e.g., logical block address (LBA), namespace) and a physical address(e.g., physical block address) that are associated with the memorydevices 130. The memory sub-system controller 115 can further includehost interface circuitry to communicate with the host system 120 via thephysical host interface. The host interface circuitry can convert thecommands received from the host system into command instructions toaccess the memory devices 130 as well as convert responses associatedwith the memory devices 130 into information for the host system 120.

The memory sub-system 110 can also include additional circuitry orcomponents that are not illustrated. In some embodiments, the memorysub-system 110 can include a cache or buffer (e.g., DRAM) and addresscircuitry (e.g., a row decoder and a column decoder) that can receive anaddress from the memory sub-system controller 115 and decode the addressto access the memory devices 130.

In some embodiments, the memory devices 130 include local mediacontrollers 135 that operate in conjunction with memory sub-systemcontroller 115 to execute operations on one or more memory cells of thememory devices 130. An external controller (e.g., memory sub-systemcontroller 115) can externally manage the memory device 130 (e.g.,perform media management operations on the memory device 130). In someembodiments, memory sub-system 110 is a managed memory device, which isa raw memory device 130 having control logic (e.g., local mediacontroller 135) on the die and a controller (e.g., memory sub-systemcontroller 115) for memory management within the same memory devicepackage. An example of a managed memory device is a managed NAND (MNAND)device.

The computing system 100 includes a storage structure 124 in the hostsystem 120 and a host negotiation component 214 in memory sub-system110. Storage structure 124 can be configured to adapt to a reduction inthe capacity of memory sub-system 110, as discussed throughout thefigures. In some embodiments, the host system 120 includes at least aportion of the capacity management functionality. In other embodiments,or in combination, the controller 115 and/or processing device 223 ofhost system 120 includes at least a portion of the capacity managementfunctionality. For example, the controller and the processing device(processor) of the host system 120 can be configured to executeinstructions stored in memory for performing operations to manage thereduction in capacity of the memory sub-system and for configuring thestorage structure 124 in view of the reduced capacity as describedherein.

FIG. 2 is a detailed block diagram of the computing system 100 thatincludes a host system 120 and a memory sub-system 110 that can adapt tofailures by reducing the capacity of the memory sub-system 110. One ormore of the failures can occur at the same time or at different timesand can be spread over an extended duration of time (e.g., days, weeks,years). The technology can enable host system 120 and memory sub-system110 to repeatedly adapt to the reduction in capacity caused by eachfailure. In the example shown, memory sub-system 110 can be associatedwith multiple memory devices 130A-Z, capacities 232A-Z, failures 234A-Z,and data 236A-B.

Memory devices 130A-Z can include high density non-volatile memorydevices where retention of data is desired when no power is supplied tothe memory device. One example of non-volatile memory devices is anegative-and (NAND) memory device. Other examples of non-volatile memorydevices are described above in conjunction with memory device 130 ofFIG. 1. A non-volatile memory device is a package of one or more dieswith sets of blocks (e.g., physical blocks) and each block can include aset of pages. A page can include a set of cells (e.g., memory cells) andeach cell can be an electronic circuit that stores information.Depending on the cell type, a cell can store one or more bits of binaryinformation and can have various logic states that correlate to thenumber of bits being stored. The logic states can be represented bybinary values, such as “0” and “1”, or combinations of such values.Example cell types include Single-Level Cells (e.g., 1 bit per cell),Multi-Level Cell (e.g., 2 bits per cell), Triple-Level Cell (e.g., 3bits per cell), Quad-Level Cells (e.g., 4 bits per cell), otherquantity, or a combination thereof.

A set of memory devices can include one or more memory devices of memorysub-system 110. The set can include all of the memory devices of amemory sub-system or some of the memory devices of a memory sub-system.In the example shown in FIG. 2, the set of memory devices of memorysub-system 110 can include multiple memory devices 130A-Z that are eachseparate and independent from one another (e.g., different dies). Inother examples, the set of memory devices can include a single memorydevice and the single memory device can include one or more regions,sections, or portions that are managed separately or together. In eitherexample, the set of memory devices can be associated with differentcapacities over time due to device failures (e.g., capacities 232A-Z).

Capacities 232A-Z represent the capacity of memory sub-system 110 atdifferent points in time. Each of capacities 232A-Z can be a storagecapacity that indicates the data storage space available to host system120 (e.g., maximum amount of data a host system can store on a memorysub-system). The storage capacity can be based on the capacity or sizeof the set of memory devices. In one example, the terms capacity andsize can be used interchangeable. In another example, the term capacityand size can be different and the size can be the total storage size andthe capacity can be the portion of the total storage size that isavailable externally to the host system. The remaining portion of thetotal size can be used for internal purposes (e.g., over provisioning,storing parity data, etc.). In other examples, the term capacity canalso or alternatively refer to or be based on a channel capacity andcorrespond to a rate at which data can be accessed, written, read,copied, moved, or transmitted to or from one or more memory sub-systems110, memory devices 130A-Z, host system 120, or a combination thereof.

The capacity of the set of memory devices 130A-Z can change over timeand capacity 232A can be an initial capacity and capacity 232Z can be anupdated capacity (e.g., reduced capacity). The initial capacity can bethe original capacity of the memory sub-system 110 at a time of design,manufacture, assembly, installation, initialization, or other time. Theupdated capacity can be the capacity of the memory sub-system at asubsequent point in time and can be the same, smaller, or larger thanthe initial capacity. In the example shown in FIG. 2, capacity 232A canbe an initial capacity (e.g., 1 terabyte) of memory sub-system 110 atinstallation time and is based on all of the memory devices 130A-Z inthe set being fully functional. Capacity 232Z can be an updated capacity(e.g., 900 gigabytes) of memory sub-system 110 after the set of memorydevices 130A-Z have encountered one or more failures 234A-Z.

Failures 234A-Z can include any failure that affects the capacity ofmemory sub-system 110. A failure can cause a portion of memorysub-system 110 to stop working as designed. The portion can include orbe related to a memory device (e.g., NAND die, memory cell), memorycontroller (e.g., controller 115 or 135), connector (e.g., packageconnector, interface), interconnect, expander, bus, other portion ofmemory sub-system 110 or host system 120, or a combination thereof. Thefailure can affect data that is stored by memory sub-system 110 andcause the data to be inaccessible, incorrect, inaccurate, unreliable,unpredictable, missing, erased, other effect, or a combination thereof.In one example, the failure can cause the portion to completely stopworking (e.g., cease operation). In another example, the failure cancause the portion to partially stop working and the portion can continueoperating but be unable to satisfy one or more thresholds (e.g., below aminimum threshold or above a maximum threshold). The one or morethresholds can include or relate to performance thresholds, reliabilitythresholds, capacity thresholds, redundancy thresholds, otherthresholds, or a combination thereof. The detection of failures and useof thresholds are discussed in more detail in regards to failuredetection component 212 of FIGS. 2 and 4.

Failures 234A-Z can include hardware failures, software failures, otherfailures, or a combination thereof. A hardware failure can be anyfailure caused by hardware of memory sub-system 110. Example hardwarefailures can include die failures, connector failures, communicationchannel failures, package failures, other hardware failures, or acombination thereof. A software failure can be any failure caused bycomputer code of memory sub-system 110, such as the computer codeexecuted by a controller of memory sub-system 110 (e.g., firmware,microcode, machine code, opcode, hardware instructions, or programcode). A single hardware or software failure can affect a portion of thememory device, the entire memory device, or multiple memory devices ofmemory sub-system 110. Failures 234A-Z can occur due to a defect, flaw,imperfection, or deficiency in one or more of the memory devices,connectors, bus, expanders, packages, other portion of memory sub-system110 or host system 120, or a combination thereof.

A failure can occur at any time and can be determined or detectedbefore, during, or after the failure affects the capacity of the memorysub-system 110. In one example, one or more of failures 234A-Z can occurafter the device is being used by host system 120 (e.g., operationalfailure). In another example, one or more of failures 234A-Z can occurbefore being used by host system 120 but are not detected until afterbeing used by host system 120 (e.g., latent failure, hidden failure). Ineither example, failures 234A-Z can occur at the same time or atdifferent times and the different times can be separated by one or moreminutes, hours, days, weeks, years, decades, or other duration of time.In the example shown, failures 234A-Z can occur at different times andaffect different portions of memory sub-system 110. For example, failure234A can occur at a first time (time t) and can affect the entire memorydevice 130A (e.g., die failure causing 100% storage loss of the memorydevice). Failure 234B can occur at a second time (t+1 month) and canaffect a portion of memory device 130B (e.g., cell failures causing 50%storage loss of the memory device). Failure 234Z can occur at a thirdtime (t+1 year) and can be a single failure that affects multiple memorydevices 130Y-Z (e.g., bus failure). In any of the examples provided, thefailure can adversely affect data 236A-B stored by memory sub-system 110and cause some of data 236A-B to become inaccessible.

Data 236A-B can be data stored by memory sub-system 110 in one or morememory devices. Data 236A-B can be data that is provided to memorysub-system 110 or can be data generated by memory sub-system 110. Thedata provided to memory sub-system 110 can be referred to as user dataor external data and can be externally accessible data that can beprovided by host system 120 or another memory sub-system. The datagenerated by memory sub-system 110 can be referred to as internal dataand can be data that is not externally accessible and is used forinternal uses (e.g., management, mapping, maintenance, wear leveling,redundancy, etc.).

Memory sub-system 110 can include one or more components that are usedto manage a failure and to communicate with host system 120 to manage achange in capacity of memory sub-system 110. In the example shown inFIG. 2, memory sub-system 110 includes a failure detection component212, a host negotiation component 214, and a capacity updating component216. Failure detection component 212 can enable memory sub-system 110 toinspect itself to detect a failure and to determine the effect on thecapacity of memory sub-system 110. Host negotiation component 214 canenable the memory sub-system 110 to communicate with the host system 120to indicate the occurrence and/or consequences of a failure. Hostnegotiation component 214 can also interact with host system 120 torecover and relocate data. Capacity updating component 216 enablesmemory sub-system 110 to reduce the capacity of the memory sub-system110 with or without preserving data and to rebuild internal data in viewof the reduced capacity (e.g., rebuild parity data). Components 212,214, and 216 are discussed in more detail in regards to FIG. 4 and cancommunicate with host system 120 over communication channel 227.

Communication channel 227 can communicably couple memory sub-system 110with host system 120. Communication channel 227 can include one or moreinterfaces, connectors, interconnects, adapters, other piece of hardwareor software, or a combination thereof. Communication channel 227 canimplement a standard or proprietary communication protocol that includesor is based on Non-Volatile Memory Express™ (NVMe), Advanced HostController Interface™ (AHCI), Serial Advanced Technology AttachmentInterface™ (e.g., SATA, mSATA), Peripheral Component Interconnect™(e.g., PCI, PCIe), Small Computer System Interface™ (SCSI, iSCSI),Integrated Drive Electronics™ (e.g., IDE, EIDE), InfiniBand™, ComputeExpress Link™ (CXL), other communication technology, or a combinationthereof. Memory sub-system 110 and host system 120 can use communicationchannel 227 to transmit one or more messages 229A-B.

Messages 229A-B can be messages that relate to a failure or to a changein capacity caused by the failure. A message can be the same or similarto a signal, interrupt, notification, event, indication, packet, frame,datagram, other communication unit, or a combination thereof. A messagecan be a signal that is absent message content or can be a signal thatincludes message content at the beginning (e.g., header), middle (e.g.,payload, body), or end (e.g., tail, footer, trailer) of the message. Themessage content can be data (e.g., message data) that includesidentification data (e.g., event, event type, command, source, or targetidentifier), pointer data (e.g., address of a set or other datastructure), other data, or a combination thereof. In one example, one ormore of messages 229A-B can be an Asynchronous Event Notifications(AEN), an Asynchronous Event Request (AER), other asynchronous orsynchronous event, or a combination thereof. In the example shown inFIG. 3, message 229A can be transmitted from memory sub-system 110 tohost system 120 and message 229B can be transmitted from host system 120to memory sub-system 110. Messages 229A and 229B are discussed in moredetail in regards to FIG. 4 and FIG. 5.

Host system 120 can include an operating system 221 that includes one ormore components that enable it to use messages 229A-B to communicatewith memory sub-system 110 and manage a reduction of the capacity of thememory sub-system 110. Host system 120 can include one or moreprocessing devices 223 and main memory 225 to execute operating system221 and a failure determination component 222, a data preservationcomponent 224, and a storage system component 226. Failure determinationcomponent 222 enables host system 120 to determine that memorysub-system 110 has detected a failure that causes a reduction incapacity. Data preservation component 224 can enable host system 120 tocontinue to use the memory sub-system at the reduced capacity andpreserve data, recover data, or a combination thereof. Storage systemcomponent 226 enables the host system 120 to reconfigure one or morestorage structures (e.g., file systems or databases) based on thefailure and the reduced capacity. Components 222, 224, and 226 arediscussed in more detail in regards to FIG. 5.

FIG. 3 is a detailed block diagram of a memory sub-system 110 thatincludes multiple zones. Memory sub-system 110 can be the same orsimilar to memory sub-system 110 of FIGS. 1 and 2 and can includemultiple memory devices 130A-Z. Memory devices 130A-Z can be made up ofmemory cells arranged in a two-dimensional grid. The memory cells can beetched onto a silicon wafer in an array of columns (also hereinafterreferred to as bitlines) and rows (also hereinafter referred to aswordlines). A wordline can refer to one or more rows of memory cells ofa memory device that are used with one or more bitlines to generate theaddress of each of the memory cells. The intersection of a bitline andwordline can constitute the address of the memory cell. A block 331 canrefer to a storage unit of the memory device (e.g., 130A) used to storedata and can include a group of memory cells, a wordline group, awordline, or individual memory cells. One or more blocks 331 can begrouped together to form a larger storage unit that is referred to as azone. Each of memory device 130A-Z can include one or more zones.

Memory sub-system 110 can be configured with a namespace that includesmultiple zones 330A-Z. The namespace can include the address space ofone or more of the memory devices 130A-Z. A namespace is a quantity ofnon-volatile memory that can be formatted into blocks (e.g., logical orphysical blocks). A controller of memory sub-system 110 (e.g.,controller 115 or 135) can support multiple namespaces that arereferenced using namespace identification data (e.g., namespace IDs,beginning LBA). A namespace can be associated with a namespace datastructure that is created, updated, or deleted using namespacemanagement or namespace attachment commands. The namespace datastructure can indicate capabilities and settings that are specific to aparticular namespace. In one example, the name data structure and thenamespace can correspond to a zoned namespace.

A zoned namespace (ZNS™) can be a sequential namespace that is definedby the NVM Express' (NVMe™) organization. A memory device that isconfigured with a zoned namespace can be referred to as a zonednamespace memory device or a ZNS memory device and can implement thezoned namespace command set as defined by NVMe. In a zoned namespace,the address space of each of the memory devices 130A-Z can be dividedinto one or more zones 330A-Z. When using a zoned namespace, writes canbe performed sequentially starting from the beginning of a zone and canbe performed at a larger granularity (e.g., 64 kilobytes) and the zonecan be inaccessible for the duration of the write operation.Accordingly, if a read request for data stored in the same zone or adifferent zone is received while the write operation is ongoing, thememory sub-system 110 will have to suspend the write operation in orderto perform the read. In one example, the zoned namespace can beimplemented by a controller of a solid state drive (SSD) and includezones 330A-Z, in which there can be one or more zones for each of theone or more memory devices 130A-Z. The use of zones is advantageousbecause it enables more efficient management of storage space as thecapacity of the memory device increases. For example, a set of one ormore zones can be designated for use by a specific application (e.g.,application, process, or thread) executed by a host system or some othersystem with access to the memory device.

Each of the zones 330A-Z can be a contiguous or non-contiguous portionof a memory device (e.g., range of blocks) that is identified andmanaged as a single storage unit. Each zone can correspond to zoneidentification data that can be used to uniquely identify the zone andcan be the same or similar to a zone identifier (zone ID), a zonedescriptor, a zone label, or other term. A zone can be a memory storageunit (e.g., memory unit) and can have a predefined size that can bebased on (e.g. a multiple of) a size of another memory storage unit(e.g., block, cell, page, die, device, or sub-system). Memory sub-system110 can use a fixed size (e.g., constant size or static size) for thezones in which all of the zones can be the same size or can use avariable size (e.g., adjustable size, dynamic size) in which the zonesused by memory sub-system 110 can have different sizes. The size of thezone can be determined (e.g., selected or detected) by memory sub-system110, memory devices 130A-Z, host system 120, storage system, devicedriver, other entity, or a combination thereof.

Updating a zone can include resetting the zone and writing to the zone.Resetting the zone can involve one or more operations that includeerasing, updating, configuring, or formatting the zone or data of thezone (e.g., content or metadata). Either the host system or memorysub-system can initiate the reset and one or more of operations can beexecuted by the host system, memory sub-system (e.g., controller 115),memory device (e.g. controller 135), other processor, or a combinationthereof. In one example, resetting a zone can update a location ofzone's write pointer to a new location (e.g., reset write pointer tobeginning of the zone). Writing to the zone is generally performedsequentially from the write pointer. The sequential write can beperformed consecutively from the top of the memory device (e.g., smalleraddresses of IC die) to the bottom of the memory device (e.g., largeraddresses of the IC die).

FIG. 4 is a block diagram illustrating exemplary components of a memorysub-system 110. In one example, memory sub-system 110 can be a SolidState Drive (SSD) that includes memory devices, local memory 119 (e.g.,DRAM), and one or more processing devices (e.g., memory controllers) forexecuting logic of the components. In the example illustrated, memorysub-system 110 can be the same or similar to the memory sub-system 110of FIG. 1-3 and can include a failure detection component 212, a hostnegotiation component 214, and a capacity updating component 216 inmemory sub-system controller 115, local media controller 135, or acombination thereof. The features of the components and modules can beimplemented in computer code (e.g., firmware, software, or othercomputer program), in hardware (e.g., circuitry), or a combinationthereof. More or less components or modules can be included without lossof generality and two or more of the components or modules can becombined into a single unit, or features of a component can be separatedinto two or more units.

Failure detection component 212 enables memory sub-system 110 to detectand log failures that can affect the capacity of the memory sub-system110. As discussed above, a failure can affect stored data or the abilityto access the stored data and can be associated with any portion ofmemory sub-system 110, such as one or more of the memory devices,controllers, connectors, interfaces, etc. In the example shown in FIG.4, failure detection component 212 can include an inspection module 410,an inventory module 412, and a capacity determination module 414.

Inspection module 410 can enable memory sub-system 110 to inspect one ormore portions of a memory sub-system 110 to detect an indication of afailure. The portions can include or be related to a memory device(e.g., NAND Die), memory controller (e.g., controller 115 or 135),connector (e.g., package connector, interface), interconnect, bus,expander, other portion of memory sub-system 110 or host system 120, ora combination thereof. Inspection module 410 can provide a deviceself-test and include executable logic that enables a processing deviceof the memory sub-system 110 (e.g., controller 115 or 135) to inspectthe portion indirectly or directly.

Indirectly inspecting a portion of memory sub-system can involveinspecting one or more data structures that represent the portion andstore an indication of a failure. The indication of the failure can be asignal, message, or data that indicates the existence of a failure, asize of a failure, a type of failure, a location of a failure, aquantity of a failures, other aspect of a failure, or a combinationthereof. The data structure can be or include one or more logs (e.g.,error log, access log), pointers (e.g., memory address of failure),identifiers (e.g., zone identifier, logical block address), flags (e.g.,bit flag, processor register), list (e.g., linked list), index, queue,array, table, matrix, other data structure, or a combination thereof.

Directly inspecting a portion of memory sub-system can involve scanningor testing the portion of the memory sub-system that has the failure.Scanning the portion can be the same or similar to searching and caninvolve accessing or attempting to access the portion and analyzing theresults of the access (e.g., check whether value can be read, locationcan be accessed, response is received). Testing the portion can involveaccessing the portion and comparing the results of the access withexpected data (e.g., comparing read values with expected values orthresholds). Testing can also or alternatively provide an input that issubsequently tested. For example, the testing can provide the input(e.g., write data, send signal) and subsequently check the input or itscorresponding output (e.g., read the written data, check for a responseto the signal).

Inspecting the portion can involve generating or updating one or moremeasurements. The measurements can indicate a reliability, performance,other aspect of the portion of memory sub-system, or a combinationthereof. The measurements can include one or more numeric values,character values, statistical values, probabilistic values, othervalues, or a combination thereof and can represent a quantity,percentage, ratio, mean, median, standard deviation, or othermathematical property. In one example, the measurement can be areliability measurement that represents the ability for the portion(e.g., memory device, memory cell) to reliably store data. Thereliability measurement can be based on the number of times the portionreliably or unreliably stores data and the value can increase ordecrease when the data stored by the portion includes an error (e.g.,bit flip, invalid value, wrong voltage).

Inventory module 412 enables memory sub-system 110 to inventory thefailures by updating an inventory with data related to the failures. Thedata related to the failures can be stored in local memory 119 asfailure data 442. Failure data 442 can be the same or similar to healthdata and can include data identifying or describing the effects offailures, causes of failures, indications of failure, other aspect offailures, or a combination thereof. The effects of failures can be theresults or outcomes of the failure and can include a set of storageunits (e.g., blocks, zones), memory devices, controllers, other portionof memory sub-system 110, or a combination thereof. In one example,inventory module 412 can generate a set of the one or more storage unitsthat have been effected by the failures and store it as failure data442. The set can be referred to as the failed set, inaccessible set,defective set, malfunctioning set, faulty set, or other term. The causeof the failures can also be detected and recorded (e.g., inventoried)and can relate to temperature (e.g., extreme heat or cold), humidity(e.g., wetness or dryness), electricity (e.g., leakage, current orvoltage surge, short circuit, electrostatic discharge), magnetism (e.g.,magnetic field, magnetic force), electromagnetism (e.g., electromagneticinference (EMI), electromagnetic radiation (EMR)), other cause, or acombination thereof.

Capacity determination module 414 enables memory sub-system 110 todetermine the capacity of the memory sub-system 110 before, during, orafter a failure. As discussed above, the capacity can be a storagecapacity that is based on the storage size of a set of one or morememory devices. The storage capacity can be less than the storage sizeof the set and can depend on the amount of storage space used forinternal use (e.g., internal data and data structures). Determining thecapacity can be based on whether the memory sub-system 110 is providingover provisioning, wear leveling, error detection, error correction,recovery, redundancy, garbage collection, compression, encryption, otherfeature, or a combination thereof. In one example, capacitydetermination module 414 can calculate the change in capacity or the newcapacity (e.g., reduced capacity) based on the set of storage unitseffected by failures, a set of storage units unaffected by failures, allthe storage units, or a combination thereof. The calculation can involveaggregating (e.g., adding) the capacity or size of one or more of thesesets and storing the result as capacity data 446.

Capacity determination module 414 can determine one or more newcapacities, which can each be referred to as a failure induced capacity.When determining the failure induced capacity there can be a tradeoff(e.g., inverse relationship) between capacity and one or more otherfeatures of the memory sub-system, such as, performance, reliability,recoverability, other features, or a combination thereof. A firstfailure induced capacity can correspond to a capacity that keeps theother features constant or substantially constant (e.g., with 5% oforiginal). For example, the first failure induced capacity can be for areduced capacity (e.g., 10% capacity reduction) that keeps the storagespace available for internal use constant (e.g., same amount orproportion), which minimizes or eliminates any reduction in space usedfor overprovisioning and parity data. A second value can correspond to acapacity that minimizes the change to the capacity at the cost of theother features (e.g., performance and recoverability is reduced). Forexample, this failure induced capacity can minimize the reduction incapacity (e.g., 1% reduction, as opposed to 10% reduction) by allowingfor a greater reduction in the storage space available for internal use,which adversely affects overprovisioning, parity data, or other internaluse. In one example, the failure induced capacities cab be calculatedusing one or more mathematical functions (e.g., equations, formulas)that represent relationships between the features (e.g., tradeoffbetween capacity and performance). The mathematical function can besolved so that one or more of the features are maximized, minimized,remain constant, or a combination thereof.

Host negotiation component 214 enables memory sub-system 110 tocommunicate with host system 120 to negotiate a change in the capacityof memory sub-system 110. In one example, host negotiation component 214can include a notification module 420, a data recovery module 422, adata relocation module 424, an instruction receiving module 426, othermodule, or a combination thereof.

Notification module 420 enables memory sub-system 110 to notify the hostsystem of failures. Notifying the host system can involve generating anotification that indicates an existence of a failure, a type offailure, a portion of the memory sub-system affected by the failure,other information, or a combination thereof. The notification can be inthe form of a message (e.g., message 229A) that is sent by memorysub-system 110 and transmitted over a communication channel to the hostsystem. Notification module 420 can transmit one or more messages thatcorresponds to the same failure. A first message can notify the hostsystem that a failure was detected (e.g., occurred, is present, exists)and can include an indication that the capacity has been reduced. Theindication can include one or more values that indicate whether thecapacity changed (e.g., binary yes/no), that indicate the amount thecapacity changed (e.g., 100 GB lost), that indicate the amount of dataaffected (e.g., amount of external data and/or internal data effected),that indicate a new capacity, other value, or a combination thereof. Asecond message can notify the host system of a set of one or morestorage units that are affected by the failure. The set of storage unitscan be a set of blocks (e.g., logical block addresses), zones (e.g.,zone identifiers), devices (e.g., dies, packages), other unit, or acombination thereof. The set of storage units can correspond to a singlememory device or different memory devices. The second message or asubsequent message can also or alternatively indicate whether dataaffected by the failure can or cannot be accessed, corrected, orrecovered. The first message and the second message can be consolidatedinto a single message or be spread across more messages.

Data recovery module 422 enables memory sub-system 110 to recover storeddata that was affected by the failures. Recovering the stored data caninvolve accessing recovery data 444 and performing error detection(e.g., detecting data changes), error correction (e.g., fixing changeddata), data recovery (recovering erased data), or a combination thereof.The recovery data 444 can be stored in local memory 119 and can includeerror detection data (e.g., error detection codes, checksums, CyclicRedundancy Check (CRC)), error correction data (e.g., error correctingcode (ECC), forward error correction (FEC), erasure code), redundancydata (e.g., duplicate data, parity data), other data, or a combinationthereof. Data recovery module 422 can attempt to access data of one ormore of the storage units that are affected by the failure. Datarecovery module 422 can use recovery data 444 to detect data that iserror free and can be preserved. Data recovery module 422 can also oralternatively use recovery data 444 to correct data that is accessibleor to regenerate data that is inaccessible.

When data recovery module 422 generates data that is inaccessible it ispossible that memory sub-system 110 can no longer have sufficientstorage capacity to store the generated data. Data recovery module 422can enable memory sub-system 110 to indicate to the host system that theset of memory devices is able to recover the data but unable to storethe recovered data. The portion of data that the memory sub-system isunable to store can be referred to as excess data (e.g., data in excessof reduced capacity). The memory sub-system can then receive from thehost system a storage location to store the recovered data and providethe recovered data for storage at the storage location. This process isdiscussed in more detail in regards to data relocation module 424.

Data relocation module 424 enables memory sub-system 110 to relocatedata of memory sub-system 110. Relocating data can involve operationsthat include read, write, move, copy, duplicate, deduplicate, encrypt,decrypt, compress, decompress, other operation, or a combinationthereof. Data relocation module 424 can relocate data from a firstlocation (e.g., original location, source location) to one or moresecond locations (e.g., new location, destination location, targetlocation). The first and second locations can be internal locations thatare internal to the memory sub-system 110, external locations that areexternal to the memory sub-system 110, or a combination thereof. Theinternal locations can include locations in one or more of the memorydevices (e.g., NAND Die) or in the local memory 119 of memory sub-system110 (e.g., controller DRAM). The external locations can include alocation of the host system that is external to memory sub-system 110. Alocation of the host system can be inside the host system (e.g., withina PC or server) or can be outside the host system (e.g., over a computernetwork). The external location can include a location in primarystorage of the host system (e.g., main memory 225), secondary storage ofthe host system (e.g., another memory sub-system, hard disk drive(HDD)), storage outside the host system (e.g., network attached storage(NAS), storage area network (SAN)), a processor of the host system(e.g., CPU, GPU, Network Adapter), other location, or a combinationthereof.

The locations can be determined by memory sub-system 110 or host system120 and be based on input data of the host system, memory sub-system,other system, or a combination thereof. Memory sub-system 110 canreceive data from the host system that indicates one or more of thelocations. In one example, the host system can provide an externallocation (e.g., target location) to memory sub-system 110 and memorysub-system 110 can transmit data to the external location. In anotherexample, host system can provide an internal location (e.g., sourcelocation) without providing a particular external location and thememory sub-system 110 can respond to the host system by transmitting(e.g., responding, replying) with the data, which can be similar to atraditional access request (e.g., read request). In yet another example,host system can provide both an internal location and an externallocation to the memory sub-system 110 and memory sub-system 110 can copyor move (e.g., relocate) the data from the internal location to theexternal location.

Memory sub-system 110 can transmit data to an external location of thehost system with or without transmitting it to the CPU of the hostsystem. In one example, memory sub-system 110 can transmit data over acommunication channel to the CPU of the host system where it istemporarily stored by the CPU as it is transferred to the externallocation. In another example, memory sub-system 110 can transmit dataover a communication channel to the external location withouttransmitting the data to the CPU and therefore avoiding the CPU fromhaving to temporarily store the data. This latter example can usetechnology that is the same or similar to Direct Memory Access (DMA),Data Direct Input/Output (DDIO), Remote Direct Access Memory (RDMA),other I/O acceleration technology, or a combination thereof.

Direct memory access is a feature of some host systems and enablescertain hardware sub-systems to access memory of the host system (e.g.,main memory 225) independent of the central processing unit (CPU). Thehardware sub-systems can include one or more memory sub-systems (e.g.,SSD controllers), hard disk drive (HDD) controllers, network interfacecontrollers (NIC), graphics controller, sound cards, other hardwaredevices, or a combination thereof. The host system and/or memorysub-system can enable the transmission of data using direct memoryaccess. Without DMA, the CPU temporally stores the transmitted data(e.g., an ephemeral copy) when using programmed input/output and istypically occupied for the entire duration of a read or write operation.With DMA, the CPU can configure one or more hardware sub-systems toaccess the storage location of the host system and/or other host systemand can enable the CPU to do other operations while the data is beingtransferred. This feature is particularly useful when a lot of data isbeing transferred and the CPU cannot keep up with the rate of datatransfer. DMA can offload expensive memory operations, such as largecopies, from the CPU to the other hardware sub-systems and the CPU cansubsequently receive an interrupt when the operations are complete.Remote direct memory access (RDMA) is a form of direct memory access inwhich one of the hardware systems internal to the host machine cantransfer data to a location outside of the host system transmitting thedata through the CPU. This can be done by enabling the hardwaresub-system (e.g., memory sub-system 110) to transmit the data to memoryof the network interface controller (e.g., network adapter, networkcard), which can transmit the data over a network to a device outside ofthe host system (e.g., NAS, SAN, remote host system).

Instruction receiving module 426 can enable memory sub-system 110 toreceive and process an instruction indicating whether or not to continueoperation at a reduced capacity. The capacity of memory sub-system 110can be reduced before, during, or after receiving the instruction. Inone example, the capacity could have been reduced before receiving theinstruction and the instruction can cause the memory sub-system tocontinue operating at the reduced capacity. In another example, thecapacity could have remained the same after detecting the error and theinstruction can cause the memory sub-system to reduce the capacity andcontinue at the reduced capacity. This can occur when memory sub-system110 detects the failure and is able to temporarily avoid the reductionin capacity. This can involve delaying the reduction (e.g., delaydownshifting the multi-level cells) or temporarily compensating for anyreduction in capacity by using internal space (e.g., reduceoverprovisioning or redundant storage), compressing existing data,relocating data, other operation, or a combination thereof. In eitherexample, the instruction can cause the memory sub-system 110 toeventually operate at the reduced capacity.

The instruction can include one or more instructions, commands, signals,messages, machine code, operations, opcodes, or a combination thereof.The instruction can be associated with data (e.g., instruction data orcontent) that functions as an indication on whether to change thecapacity (e.g., reduce the capacity) or to continue or discontinueoperating at a previously changed capacity. In one example, the data canindicate one or more capacities and can include an original capacity (1TB), a new capacity (900 GB), an incremental change to the capacity(e.g., reduce by 100 GB), other capacity value, or a combinationthereof. In another example, the data can indicate a binary response(yes/no, true/false) regarding whether to proceed with changing thecapacity or operating at the changed capacity. In either example, memorysub-system 110 can respond to the instruction by executing capacityupdating component 216.

Capacity updating component 216 can enable memory sub-system 110 toupdate its configuration in response to a failure. This can involveupdating the set of memory devices and one or more data structures inview of a changed capacity. As discussed above, the capacity cancorrespond to the portion of storage space that is externally availableto the host system and can be a subset of the total storage space ofmemory sub-system 110 because a portion of the storage space can be usedfor internal use. Capacity updating component 216 can execute one ormore times in response to detecting a particular failure and can toreduce the capacity, keep the capacity constant, or increase thecapacity. In one example, capacity updating component 216 can configurememory sub-system 110 to operate at a reduced capacity in response to afailure. In another example, capacity updating component 216 cantemporarily minimize the capacity reduction (e.g., keep the capacityconstant) after detecting the failure and can then subsequently reducethe capacity for long term operation. As discussed above, temporarilyminimizing or avoiding a capacity reduction can involve delaying thecapacity reduction by temporarily using internal use storage space, bycompressing the stored data, by postponing the downsizing of multi-levelcells, or by using parity data to provide read access to theinaccessible data. Delaying the capacity reduction can enable the hostsystem to analyze and react to the failure and an impending or existingreduction in capacity. In one example, capacity updating component 216can include a locking module 430, a capacity reduction module 432, arebuilding module 434, other modules, or a combination thereof.

Locking module 430 enables memory sub-system 110 to restrict access ofthe host system to a portion of memory sub-system 110. Locking module430 can restrict access by adding (e.g., creating, generating, applying,activating), removing (e.g., deleting, destroying, deactivating),modifying (e.g., editing, updating), or enforcing one or more locks. Thelocks can restrict access by disabling (e.g., prohibiting, blocking,stopping, closing) or enabling (e.g., allowing, permitting, authorizing)one or more different types of access, such as read access, writeaccess, other access, or a combination thereof. The locks can includeone or more read locks, write locks, or other locks. The read lock candisable the host system from having both read access and write access tothe portion of the memory sub-system that the lock corresponds to (e.g.,is applied to). The write lock can disable the host system from havingwrite access while enabling the host system to have read access.

The locks can be initiated by memory sub-system 110 or by host system120 and can apply to a particular portion of memory sub-system 110 orhost system 120. For example, a lock can apply to one or more memorysub-systems, memory devices, zones, blocks, memory cells, dies,packages, communication channels, connectors, interconnects, otherportion of a memory sub-system, or a combination thereof. The locks canrestrict access of any or all portions or combination of portions ofhost system. The restricted access can apply to some or all processes(e.g., kernel, hypervisor, application, file system), processors (e.g.,CPU/GPU), hardware sub-systems (graphics card, network interface), otherportion of a host system, or a combination thereof.

Locking module 430 can apply a lock to a portion of memory sub-systemthat is affected by the failure (e.g., failed portion). The portionbeing locked can be the same, smaller, or larger than the particularportion affected by the failure. This can occur when the granularity towhich a lock can apply is different from the portion affected by thefailure. For example, the lock can apply to an entire die or zone eventhough a small portion of the die or zone was affected by the failure.The term failed portion can refer to the particular portion that isaffected by the failure or to a larger portion that includes a portionthat was not affected by the failure. In one example, locking module canapply a write lock to the portion affected by the failure and the writelock can disable the host system's ability to write data to the portionbut enable the host system to read data for the portion. Some of thedata can be inaccessible due to the failure and can be recovered by thememory sub-system 110.

Capacity reduction module 432 enables memory sub-system 110 to updatethe configuration of the memory sub-system 110 to reduce the capacity.Updating the configuration can involve executing one or moredeactivation operations, truncating operations, downshifting operations,or a combination thereof. The deactivation operations can involvedeactivating one or more of the failed portions so they are no longerrepresented as being available to store data (e.g., external data and/orinternal data). The deactivating can be the same or similar to marking,unmapping, disabling, closing, removing, deleting, destroying, blocking,labeling, erasing, wiping, other action, or a combination thereof. Thetruncating operation can involve redistributing the storage and reducingthe total capacity by deleting a predetermined amount at the beginning,middle, or end of a storage space (e.g., internally or externallyaccessible address space). The predetermined amount can be based on theamount of storage space affected by the failure and can be the same,smaller, bigger than the amount of failed storage space.

The downsizing operation can also or alternatively be used to reduce thecapacity. As discussed above, the memory sub-system 110 can includemulti-level cells (MLC) that store more than one bit of information permemory cell. The downsizing operation can reconfigure the memorysub-system 110 and one or more of the memory devices to reduce thequantity of bits stored per memory cell from a first size (e.g., largersize, original size) to a second size (e.g., smaller size, reducedsize). The first and second sizes of the memory cells can includesingle-level cells (SLC), double-level cells (DLC), triple-level cells(TLC), quad-level cells (QLC), penta-level cell (PLC), other size cell,or a combination thereof. Each downsizing can decrease the memory cellsone or more levels and the downsizing can be repeated multiple timesuntil the multi-level cells become single-level cells or aredecommissioned.

The operations to update the configuration can apply to any portion ofthe memory sub-system. The operations can be applied to a target portionof one or more particular memory cells, blocks, zones, dies, chip,chipset, packages, other devices, or a combination thereof. Theoperations can affect the target portion that is affected by the failureand one or more other portions of memory sub-system 110. Executing theoperation on the target portion can cause some or all of the otherportions of memory sub-system to be updated (e.g., remapped, renumbered,relabeled. re-zoned re-indexed). In one example, an operation on thetarget portion can cause portions before and after (e.g., all otherportions) to be updated. In another example, an operation on the targetportion can cause subsequent portions to be updated without the priorportions being updated. In either example, the operations can reduce thecapacity by reconfiguring the memory sub-system.

Rebuilding module 434 enables memory sub-system 110 to update the datastored by memory sub-system based on the reduced capacity (e.g., newconfiguration). Updating the data can involve adding data, removingdata, or changing data of one or more data structures. The data cancorrespond to the capacity and can include pointer data (startingaddresses), mapping data (e.g., logical to physical mapping), tabledata, index data, other data, or a combination thereof. In one example,this can involve regenerating recovery data (e.g., parity data),compressing data, encrypting data, or a combination thereof.

The components and modules of FIG. 4 can be a superset or a subset ofwhat is included in a particular embodiment of memory sub-system 110. Inthe example discussed above, the memory sub-system 110 may include allof the components and modules. In other examples, memory sub-system 110can be absent features of the data recovery module 422, data relocationmodule 424, rebuilding module 434, inventory module 412, or other moduleand can be performed by another device as discussed below in regards tohost system 120 or may be unnecessary for a particular embodiment.

FIG. 5 is a block diagram illustrating exemplary components of hostsystem 120 that is connected with the memory sub-system of FIG. 4 usingone or more communication channels (not shown). The features discussedin regards to the components and modules in FIG. 5 can be implemented incomputer code (e.g., firmware, software, or other computer program) orhardware (e.g., circuitry) of host system 120 or memory sub-system 110.More or less components or modules can be included without loss ofgenerality. For example, two or more of the components can be combinedinto a single component, or features of a component can be divided intotwo or more components. In the example illustrated, host system 120 canbe the same or similar to the host system 120 of FIG. 1-2 and caninclude a failure determination component 222, a data preservationcomponent 224, and a storage system component 226. In other examples,host system 120 can be absent features of the local recovery module 520,remote recovery module 522, or other module and can rely on anotherdevice (e.g., memory sub-system 110) to perform the features or thefeatures can be absent for a particular embodiment.

Failure determination component 222 enables host system 120 to determineand inventory failures affecting the capacity of the memory sub-system110. As discussed above, a failure can affect stored data or the abilityto access the stored data and can be associated with any portion ofmemory sub-system 110, such as one or more of the memory devices,controllers, connectors, interfaces, etc. In one example, failuredetermination component 222 can include a notification receiving module510 and a logging module 512.

Notification receiving module 510 enables host system 120 to receivenotifications about a failure from memory sub-system 110. Thenotifications can enable the host system to determine that the memorysub-system has encountered a failure that reduces the storage capacityof a memory sub-system. The notifications can be generated by the memorysub-system and indicate an existence of a failure, a type of failure, aportion of the memory sub-system affected by the failure, otherinformation, or a combination thereof. The notifications can be in theform of a message (e.g., message 229A) that is sent by memory sub-system110 and transmitted over a communication channel to host system 120.Notification receiving module 510 can receive one or more messages thatcorrespond to the same failure. A first message can notify the hostsystem that a failure exists (e.g., occurred, is present) and canoptionally include an indication that the capacity of the memorysub-system has been reduced. The indication can include one or morevalues that indicate whether the capacity changed (e.g., binary yes/no),that indicate the amount the capacity changed (e.g., 100 GB lost), thatindicate the amount of data affected (e.g., external data and/orinternal data), that indicate a new capacity, other value, or acombination thereof. A second message can notify the host system of aset of one or more storage units that are affected by the failure. Theset of storage units can be a set of blocks (e.g., logical blockaddresses), zones (e.g., zone identifiers), devices (e.g., dies,packages), other unit, or a combination thereof. The set of storageunits can correspond to a single memory device or different memorydevices. The second message or a subsequent message can also oralternatively indicate whether data affected by the failure can orcannot be accessed, corrected, or recovered. The first message and thesecond message can be consolidated into a single message or be spreadacross more messages.

Logging module 512 enables host system 120 to log the failures byupdating an inventory with data related to the failures. The datarelated to the failures can be stored in main memory 225 as failure data442. Failure data 442 can be the same or similar to failure data 442 ofFIG. 4 and can be received from the memory sub-system 110 or generated,supplemented, aggregated, or augmented by host system 120. Failure data442 can be health data that includes data identifying or describing theeffects of failures, causes of failures, indications of failure, otheraspect of failures, or a combination thereof. The effects of failurescan be the results and/or response to the failures and can correspond toa set of storage units (e.g., blocks, zones, memory devices,controllers, other portion of memory sub-system 110, or a combinationthereof). In one example, logging module 512 can receive or generate theset of one or more storage units that have been affected by the failuresand store it as failure data 442. The set can be referred to as thefailed set, inaccessible set, defective set, malfunctioning set, faultyset, or other term. The cause of the failures can also be recorded(e.g., inventoried) and can relate to temperature (e.g., extreme heat orcold), humidity (e.g., wetness or dryness), electricity (e.g., leakage,current or voltage surge, short circuit, electrostatic discharge),magnetism (e.g., magnetic field, magnetic force), electromagnetism(e.g., electromagnetic inference (EMI), electromagnetic radiation(EMR)), other cause, or a combination thereof.

Data preservation component 224 enables host system 120 to enhance thepreservation of data on a memory sub-system when the capacity of thememory sub-system has been reduced. In the past, host systems wouldrespond to memory sub-system failures by indicating the memorysub-system should be replaced or by reformatting the memory sub-systemto operate at a lower capacity. Reformatting the memory sub-system is aresource intensive operation that can remove data of the memorysub-system and consumes a large amount of time, processing power,temporary storage space, I/O, and other valuable resources. Datapreservation component 224 can enhance the preservation of data bykeeping the data that survives the failure and optionally correcting orrecovering data affected by the failure. In the example shown in FIG. 5,data preservation component 224 can include a local recovery module 520,a remote recovery module 522, and a data rearrangement module 524.

Local recovery module 520 enables host system 120 to recover dataaffected by the failure of the memory sub-system using resources thatare local to the host system 120. Resources that are local to hostsystem 120 can include any hardware, software, or data that is internalto host system 120 A resource is internal to host system 120 when it isincluded within a computer enclosure of host system 120 (e.g., computerchassis, case, cabinet, frame, rack, blade). This can include primarydata storage devices (e.g., main memory), secondary data storage devices(e.g., memory sub-system 110, HDD), other devices, or a combinationthereof. In one example, local recovery module 520 can recover dataaffected by the failure (e.g., missing data) by accessing the data fromback-up, accessing the data from an original source, generating themissing data using recovery data, other recovery mechanism, or acombination thereof. In another example, local recovery module 520 cancause memory sub-system to recover the data affected by the failure, asdiscussed above in regards to data recovery module 422 of FIG. 4. Thehost system 120 can request access to data affected by the failure andthe memory sub-system can generate it before, during, or after the hostsystem 120 requests it. The memory sub-system can indicate to the hostsystem that the data was recovered or can avoid the indication andperform the data recovery transparent to host system 120. In somesituations, local recovery module 520 can be unable to recover the dataaffected by the failure of memory sub-system and can use remote recoverymodule 522.

Remote recovery module 522 enables host system 120 to recover dataaffected by the failure by using one or more resources that are remotefrom the host system 120. Resources that are remote from host system 120can include any hardware, software, or data that is external to thecomputer enclosure of host system 120. This includes resources that arecommunicable coupled to host system 120 using one or more wires, cables,connector, computer network (e.g., LAN, WAN, Internet), or a combinationthereof. In one example, remote recovery module 522 can recover the dataaffected by the failure by accessing the data from another host system.Host system 120 and the other host system can be nodes in a storagedistribution network, they could have related replicas or a back-up,peers in a cluster, other relationship, or a combination thereof.

Data rearrangement module 524 can enable host system 120 to rearrangedata on memory sub-system 110, host system 120, or a combinationthereof. Rearranging data can involve one or more operations thatinclude read, write, move, copy, duplicate, deduplicate, encrypt,decrypt, compress, decompress, other operation, or a combinationthereof. Data rearrangement module 524 can copy data from a firstlocation (e.g., original location, source location) to one or moresecond locations (e.g., new location, destination location, targetlocation). The first and second locations can be in volatile ornon-volatile storage and can be internal locations that are internal tothe memory sub-system 110, external locations that are external to thememory sub-system 110, or a combination thereof. The external locationscan include a location inside the host system (e.g., within computerenclosure) or can be outside host system 120 (e.g., over network). Theexternal location can include a location in primary storage of the hostsystem (e.g., main memory), secondary storage of the host system (e.g.,another memory sub-system, hard disk drive (HDD)), storage outside thehost system (e.g., network attached storage (NAS), storage area network(SAN)), a processor of the host system (e.g., CPU, GPU, NetworkAdapter), other location, or a combination thereof.

The locations can be determined based on data of host system 120, thememory sub-system, other system or device, or a combination thereof.Host system can provide data to memory sub-system that indicates one ormore of the locations. In one example, host system 120 can provide anexternal location (e.g., target location) to the memory sub-system andthe memory sub-system can transmit data to the external location. Inanother example, host system can provide an internal location (e.g.,source location) without providing a particular external location andthe memory sub-system can return data at the internal location, whichcan be similar to a traditional access request (e.g., read request). Inyet another example, host system 120 can provide both an internallocation and an external location to the memory sub-system and thememory sub-system can copy or move (e.g., relocate) the data from theinternal location to the external location.

Host system 120 can configure direct memory access (DMA) so that thememory sub-system can transmit data to an external location of the hostsystem without transmitting it to the CPU of the host system. DMA can beparticularly advantageous because data rearrangement module 524 can bearranging very large quantities of data (e.g., 100 GB-1 TB) and the datatransmission can be performed with little to no involvement of the CPUthat is managing the transmissions. The CPU can configure the DMAfeature and listen for a signal (e.g., trap) to determine when atransfer is complete. DMA is discussed in more detail above, in regardsto the data relocation module 424 of memory sub-system 110 in FIG. 4.

Storage system component 226 can enable host system 120 to adapt to areduction in the capacity of the memory sub-system by reconfiguring thestorage system of host system 120. The storage system can be any datastorage system and can be a file system, database system, distributedstorage system, virtual storage system, other storage system, or acombination thereof. The storage system can be managed by code executedas part of a kernel, a device driver, an application, other portion of ahost operating system, or a combination thereof. In the example shown inFIG. 5, storage system component 226 can include a capacity managementmodule 530, an instruction providing module 532, and a storage structureupdating module 534.

Capacity management module 530 can enable host system 120 to determineand control the capacity of the memory sub-system 110 before, during, orafter a failure. As discussed above, the capacity can be a storagecapacity that is based on the storage size of a set of one or morememory devices. The storage capacity can be less than the storage sizeof the set and can depend on the amount of storage space used forinternal use (e.g., internal data and data structures). Determining thecapacity can involve communicating with the memory sub-system anddetermining or controlling the memory sub-system use of overprovisioning, wear leveling, error detection, error correction,recovery, redundancy, garbage collection, compression, encryption, otherfeature, or a combination thereof. In one example, capacity managementmodule 530 can determine (e.g., calculate, detect) the change incapacity or the new capacity (e.g., reduced capacity) based on datareceived from the memory sub-system.

Capacity management module 530 can enable host system 120 to performfunctions that are the same or similar to those discussed above inregards to the capacity determination module 414 of the memorysub-system. For example, the host system 120 can determine one or morefailure induced capacities. When determining a failure induced capacity,there can be a tradeoff between capacity and one or more other featuresof the memory sub-system, such as, performance, reliability,recoverability, other features, or a combination thereof (e.g., inverserelationship between capacity and overprovisioning). A first failureinduced capacity can correspond to a capacity that keeps the otherfeatures constant or substantially constant (e.g., with 5% of original).For example, the first failure induced capacity can be for a reducedcapacity (e.g., 10% reduction) that keeps the storage space availablefor internal use constant (e.g., same amount or proportion), whichminimizes or eliminates any reduction in space used for overprovisioningand parity data. A second value can correspond to a capacity thatminimizes the change to the capacity at the cost of the other features(e.g., performance and recoverability is reduced). For example, thisfailure induced capacity can minimize the reduction in capacity (e.g.,1% reduction) by allowing for a greater reduction in the storage spaceavailable for internal use, which adversely affects overprovisioning,parity data, or other internal use. In one example, the one or morefailure induced capacities can be calculated using one or moremathematical functions (e.g., equations, formulas) that representrelationships between the features (e.g., feature tradeoffs). Themathematical function can be solved so that one or more of the featuresare maximized, minimized, or remain constant.

Instruction providing module 532 can enable host system 120 to instructthe memory sub-system to operate at a reduced capacity and to retaindata of the storage system. The instruction can be transmitted after thefailure is detected and before, during, or after the memory sub-systemhas been reconfigured to operate at the reduced capacity. In oneexample, the memory sub-system can notify the host system 120 and waitfor host system 120 to provide the instruction before reconfiguring thememory sub-system for the reduced capacity. In another example, thememory sub-system can begin the process to reduce the capacity beforethe host system provides the instruction and before, during, or afterhost system 120 is notified of the failure.

The instruction can be generated by host system 120 and include or beassociated with content (e.g., data). The instruction can include one ormore separate or combined instructions, commands, signals, messages,machine code, operations, opcodes, or a combination thereof. The contentcan function as an indication of whether to change the capacity (e.g.,reduce the capacity) or to continue or discontinue operating at apreviously changed capacity. In one example, the data can indicate abinary response (yes/no, true/false) regarding whether to proceed withchanging the capacity or operating at the changed capacity. In oneexample, the data can indicate one or more capacities and can include anoriginal capacity (1 TB), a new capacity (900 GB), an incremental changeto the capacity (e.g., reduce by 100 GB), other capacity value, or acombination thereof. In either example, host system 120 can transmit theinstruction and update storage structure 124 using storage structureupdating module 534.

Storage structure updating module 534 can enable host system 120 toadapt to a reduction in the capacity of the memory sub-system byconfiguring (e.g., reconfiguring) the storage structure 124 of thestorage system. Storage structure updating module 534 can execute as oneor more system processes (e.g., kernel processes), user processes (e.g.,application processes), or a combination thereof. Storage structure 124can include one or more data structures that are used to manage thestorage and retrieval of data from one or more memory sub-systems.Storage structure 124 can include data structures and rules used toorganize the data and can involve separating the data into storage unitsthat that can be individually identified and accessed. Some or all ofstorage structure 124 can be stored in main memory 225, memorysub-system 110, other primary or secondary storage, or a combinationthereof. In one example, storage structure 124 can be a file system asdiscussed in more detail below.

File system can include multiple layers and the multiple layers caninclude a logical file system (e.g., logical layer), a virtual filesystem (e.g., virtual layer), a physical file system (e.g., physicallayer), other layer, or a combination thereof. The logical file systemcan manage interactions with applications and can provide an applicationprogram interface (e.g., file system API) that exposes file systemoperations (e.g., open, close, create, delete, read, write, execute) toother computer programs. The logical layer of the file system can managesecurity and permissions and maintain open file table entries andper-process file descriptors. The logical file system can pass requestedoperations (e.g., write requests) to one or more other layers forprocessing. The virtual file system can enable the host operating systemto support multiple concurrent instances of physical file systems, eachof which can be referred to as a file system implementation. Thephysical file system can manage the physical operation of the storagedevice (e.g. memory sub-system 110). The physical file system can handlebuffering and manage main memory and can be responsible for the physicalplacement of storage units in specific locations on memory devices130A-Z. The physical file system can include device mapping logic andcan interact with device drivers (e.g., SSD driver) or with the channelto interact with memory sub-system 110. One or more of the file systemlayers can be explicitly separated or can be combined together in orderto store file system data.

The file system data can be any data associated with the file system andcan include data received by the file system (e.g., user data) or datagenerated by the file system. The file system data can represent data ofone or more external file system objects, internal file system objects,or a combination thereof. The external file system objects can be filesystem objects that are externally accessible by a computer program(e.g., applications) using the file system API. The external file systemobjects can include files (e.g., file data and metadata), directories(e.g., folders), links (e.g., soft links, hard links), or other objects.The internal file system objects can be file system objects that remaininternal to the file system and are inaccessible using the file systemAPI. The internal file system objects can include storage tree objects(e.g., extent map, extent tree, block tree), stream objects (e.g.,stream identifiers), file group data (e.g., group of similar files),storage units, block groups, extents, or other internal data structures.

Each file system object can be associated with object data and objectmetadata. The object data can be the content of the object (e.g., filedata) and the object metadata can be information about the object (e.g.,file metadata). The object metadata can indicate attributes of theobject such as a storage location (e.g., zone, block group, storageunit), data source (e.g., stream, application, user), data type (e.g.,text, image, audio, video), size (e.g., file size, directory size), time(e.g., creation time, modification time, access time), ownership (e.g.,user ID, group ID), permissions (e.g., read, write, execute), filesystem location (e.g., parent directory, absolute path, local path),other attribute, or a combination thereof. In one example, the filesystem data can include data for a new file and the new file can includefile data and file metadata. The file data can include the content ofthe file (e.g., image content, audio content) and the file metadata caninclude one or more attributes of the content (e.g., identifiercorresponding to a zone z, stream s, and/or application a).

The object data and object metadata (e.g., attributes, tree nodes) canbe stored together in the same data structure at the same storagelocation or can be stored separately in different data structures atdifferent storage locations. For example, storage structure 124 canstore the object metadata in an index node (e.g., Mode) data structureand the index node data structure can have one or more pointers to theobject data. The inode can be a data structure in a Unix-style filesystem that describes a file system object. Each inode can indicate theattributes and storage locations (e.g., block addresses) of the data ofthe file system object. A directory can be represented as an inode andcan contain an entry for itself, its parent (e.g., parent directory),and each of its children (e.g., child directories or files).

File system can divide allocated space into block groups which can bevariable-sized allocation regions. The allocation regions can be used tostore object metadata (e.g., extent tree node, inodes) and object data(e.g., file content, extents). A block group (BG) can be understood as acontiguous portion a file system object (e.g., a series of LBAs) that isallocated to a contiguous area of a memory device and is reserved forfile system data of the file system. This contiguous area can berepresented as a range of block numbers (e.g., physical addresses).Larger files can be partitioned into the block groups that areindividually tracked to make allocation and management of the filesfeasible over a necessary series of allocation and writes to memorydevices 130A-Z. The default ratio of object data to object metadata canbe 1:2. They are intended to use concepts of the Orlov block allocatorto allocate related file system objects together and resistfragmentation by leaving free space between groups. (Ext3 block groups,however, have fixed locations computed from the size of the file system,whereas those in b-tree file system are dynamic and created as needed.)Each block group can be associated with a block group identifier (e.g.,block group item). Modes in the file system tree can include a referenceto a corresponding block group (e.g., pointer to storage unit).

FIG. 6 is a flow chart of a method 600 that is executed by a memorysub-system to manage a reduction to the capacity of the memorysub-system, according to an embodiment. The method 600 can be performedby processing logic that can include hardware (e.g., processing device,circuitry, dedicated logic, programmable logic, microcode, hardware of adevice, integrated circuit, etc.), software (e.g., instructions run orexecuted on a processing device), or a combination thereof. Althoughshown in a particular sequence or order, unless otherwise specified, theorder of the processes can be modified. Thus, the illustratedembodiments should be understood only as examples, and the illustratedprocesses can be performed in a different order, and some processes canbe performed in parallel. Additionally, one or more processes can beomitted in various embodiments. Thus, not all processes are required inevery embodiment. Other process flows are possible.

At operation 610, the processing logic can detect a failure of at leastone memory device of the set, wherein the failure affects stored data.In one example, the memory sub-system is a solid state drive (SSD) andthe processing device is a memory controller of the solid state drive.In one example, the processing device can detect multiple failures thatoccur at different times and affect different memory devices of the set.

At operation 620, the processing logic can notify a host system, such ashost system 120, of a change in a capacity of the set of memory devices,such as memory devices 130A-130Z. The notifying can involve transmittinga first message to the host system to indicate the failure andtransmitting a second message to the host system to indicate a set ofstorage units affected by the failure. The first message and/or secondmessage are Asynchronous Event Notification (AEN) messages. In oneexample, the processing device can notify the host system after each offailure and reduce the capacity after each of the failures.

At operation 630, the processing logic can receive from the host systeman indication to continue at a reduced capacity. In one example, theoperations can involve determining whether the capacity after a secondfailure satisfies a threshold capacity. The threshold capacity can be apredetermined minimum capacity for the set of memory devices. Responsiveto the threshold capacity being satisfied, the processing device canindicate to the host system that the set of memory devices is operableat a reduced capacity. Responsive to the threshold capacity beingunsatisfied, the processing device can indicate to the host system thatthe set of memory devices is inoperable.

At operation 640, the processing logic can update the set of memorydevices to change the capacity to the reduced capacity. This can involvelocking a failed portion of the at least one memory device. The lockingcan include a write lock that enables reads by the host system anddisables writes by the host system. In one example, the processingdevice can provide the host system with data that is recovered inresponse to a read request of the host system to the failed portion. Theprocessing device can also or alternatively delete data of the at leastone memory device and generate recovery data for the set of memorydevices based on the reduced capacity. In other examples of method 600,the operations can include recovering the stored data affected by theone or more failures using recovery data that is stored in the set ofmemory devices.

FIG. 7 is a flow chart of a method 700 that is executed by a memorysub-system to manage a reduction to the capacity of the memorysub-system, according to an embodiment. The method 700 can be performedby processing logic that can include hardware (e.g., processing device,circuitry, dedicated logic, programmable logic, microcode, hardware of adevice, integrated circuit, etc.), software (e.g., instructions run orexecuted on a processing device), or a combination thereof. Althoughshown in a particular sequence or order, unless otherwise specified, theorder of the processes can be modified. Thus, the illustratedembodiments should be understood only as examples, and the illustratedprocesses can be performed in a different order, and some processes canbe performed in parallel. Additionally, one or more processes can beomitted in various embodiments. Thus, not all processes are required inevery embodiment. Other process flows are possible.

At operation 710, the processing logic can configure the memory devicewith a zoned namespace that includes multiple zones. The zoned namespacecan be a sequential namespace that is defined by the NVM Express™(NVMe™) organization. In a zoned namespace, the address space of each ofthe memory devices can be divided into one or more zones. Each of thezones can be a contiguous or non-contiguous portion of a memory device(e.g., range of blocks) that is identified and managed as a singlestorage unit. Each zone can correspond to zone identification data thatcan be used to uniquely identify the zone and can be the same or similarto a zone identifier (zone ID), a zone descriptor, a zone label, orother term. A zone can be a memory storage unit (e.g., memory unit) andcan have a predefined size that can be based on (e.g. a multiple of) asize of another memory storage unit (e.g., block, cell, page, die,device, or sub-system). In one example, the memory sub-system is a solidstate drive (SSD) and the processing device is a memory controller ofthe solid state drive.

At operation 720, the processing logic can notify a host system of afailure associated with a zone of the multiple zones and the failure canaffect stored data. In one example, the notifying can involvetransmitting a message that indicates to the host system a set of one ormore zones of the memory devices that are affected by the failure.

At operation 730, the processing logic can receive from the host systeman indication to continue at a capacity that is reduced. In one example,the processing device can also or alternatively indicate to the hostsystem that the capacity of the set of memory devices is unable to storerecovered data. The processing device can receive, from the host system,a storage location to store the recovered data. The storage location canbe in main memory of the host system.

At operation 740, the processing logic can recover the stored data ofthe zone affected by the failure. The recovering of stored data caninvolve accessing recovery data (e.g., parity data) stored by the memorydevice and generating the stored data affected by the failure based onthe recovery data.

At operation 750, the processing logic can update the set of memorydevices to change the capacity to a reduced capacity. The updating caninvolve locking the zone associated with the failure of the at least onememory device. The locking can use a write lock that enables reads bythe host system and disables writes by the host system. The processingdevice can provide the host system with data that is recovered inresponse to a read request for the zone. The processing device can alsoupdate the zoned namespace to reduce the capacity, which can involvedeactivating the zone and deleting all the data in the zone. Theprocessing device can generate recovery data for the set of memorydevices based on the reduced capacity.

FIG. 8 is a flow chart of a method 800 that is executed by a memorysub-system to manage a reduction to the capacity of the memorysub-system, according to an embodiment. The method 800 can be performedby processing logic that can include hardware (e.g., processing device,circuitry, dedicated logic, programmable logic, microcode, hardware of adevice, integrated circuit, etc.), software (e.g., instructions run orexecuted on a processing device), or a combination thereof. Althoughshown in a particular sequence or order, unless otherwise specified, theorder of the processes can be modified. Thus, the illustratedembodiments should be understood only as examples, and the illustratedprocesses can be performed in a different order, and some processes canbe performed in parallel. Additionally, one or more processes can beomitted in various embodiments. Thus, not all processes are required inevery embodiment. Other process flows are possible.

At operation 810, the processing logic can detect a failure of a memorydevice that stores multiple bits per memory cell. Detecting the failurecan involve calculating a reliability measurement based on an ability ofthe memory device to store the multiple bits per memory cell. Theprocessing device can determine that the failure exists responsive tocomparing the reliability measurement and a predetermined thresholdvalue. In one example, the memory sub-system is a solid state drive(SSD) and the processing device is a memory controller of the solidstate drive.

At operation 820, the processing logic can send a message to a hostsystem indicating a reduced capacity of the set of memory devices.Sending the message can involve sending a first message to the hostsystem to indicate the failure and sending a second message to the hostsystem to indicate a set of storage units affected by the failure. Thefirst message and/or second message can be Asynchronous EventNotification (AEN) messages.

At operation 830, the processing logic can receive from the host systema message to continue at the reduced capacity. In one example, theprocessing device can indicate to the host system that the set of memorydevices includes data in excess of the reduced capacity. The processingdevice can receive from the host system a storage location to store therecovered data and provide the data in excess of the reduced capacity tothe storage location. The storage location can be in main memory of thehost system or at another location.

At operation 840, the processing logic can update the set of memorydevices based on the reduced capacity. The updating involves reducingthe quantity of bits stored per memory cell of one or more memorydevices of the set. In one example, the memory device includes (e.g., ismade up of) Multi-Level Cells (MLC) and reducing the quantity of bitsstored per memory cell involves downshifting Quad-Level Cells (QLC) toTriple-Level Cells (TLC).

Method 800 can also or alternatively involve the processing devicedetecting a second failure of the same memory device. The second failurecan be detected based on an inability of the memory device to store thereduced quantity of bits per memory cell. The processing device myrespond to the second failure by updating the set of memory devices tofurther reduce the quantity of bits stored per memory cell of the memorydevice (e.g., from TLC to SLC).

FIG. 9 is a flow chart of a method 900 that is executed by a memorysub-system to manage a reduction to the capacity of the memorysub-system, according to an embodiment. The method 900 can be performedby processing logic that can include hardware (e.g., processing device,circuitry, dedicated logic, programmable logic, microcode, hardware of adevice, integrated circuit, etc.), software (e.g., instructions run orexecuted on a processing device), or a combination thereof. Althoughshown in a particular sequence or order, unless otherwise specified, theorder of the processes can be modified. Thus, the illustratedembodiments should be understood only as examples, and the illustratedprocesses can be performed in a different order, and some processes canbe performed in parallel. Additionally, one or more processes can beomitted in various embodiments. Thus, not all processes are required inevery embodiment. Other process flows are possible.

At operation 910, the processing logic can detect a failure of multiplememory devices of the set. The failure can cause data of the memorydevices to be inaccessible. In one example, the failure of the memorydevices is a hardware failure of at least one of a connector, acommunication channel, or a die.

At operation 920, the processing logic can determine the capacity of theset of memory devices has changed to a reduced capacity. In one example,memory sub-system is a solid state drive (SSD) and the processing deviceis a memory controller of the solid state drive.

At operation 930, the processing logic can notify the host system of thereduced capacity. The notification indicates a set of storage units thatinclude the data that is inaccessible due to the failure. In oneexample, the notifying involves the processing device transmitting amessage that indicates to the host system a set of logical blocks thatinclude the data that is inaccessible. In another example, the notifyinginvolves the processing device transmitting a message that indicates tothe host system a set of one or more zones that include the data that isinaccessible.

At operation 940, the processing logic can recover the data of the setof storage units from the host system after the failure. The recoveringinvolves the processing device recovering a portion of the data that isinaccessible using parity data stored on the set of memory devices.

At operation 950, the processing logic can update the set of memorydevices to store the recovered data and to change the capacity to thereduced capacity. Updating can involve locking the failed portion of theat least one memory device. The locking can include a write lock thatenables reads by the host system and disables writes by the host system.The processing device can provide the host system with the recovereddata in response to a read request for the failed portion. Theprocessing device can delete data of the at least one memory device andgenerate or update the parity data for the set of memory devices basedon the reduced capacity.

FIG. 10 is a flow chart of a method 1000 that is executed by a hostsystem to manage a reduction to the capacity of a memory sub-system,according to an embodiment. The method 1000 can be performed byprocessing logic that can include hardware (e.g., processing device,circuitry, dedicated logic, programmable logic, microcode, hardware of adevice, integrated circuit, etc.), software (e.g., instructions run orexecuted on a processing device), or a combination thereof. Althoughshown in a particular sequence or order, unless otherwise specified, theorder of the processes can be modified. Thus, the illustratedembodiments should be understood only as examples, and the illustratedprocesses can be performed in a different order, and some processes canbe performed in parallel. Additionally, one or more processes can beomitted in various embodiments. Thus, not all processes are required inevery embodiment. Other process flows are possible.

At operation 1010, the processing logic can determine that a failureaffects the storage capacity of the memory sub-system. The failure caninclude a failure of at least one of a die, a connector, or acommunication channel of the memory sub-system. The memory sub-systemcan store data of one or more storage structures of a storage system. Inone example, the memory sub-system can be a solid state drive (SSD) andthe host system can execute a device driver that communicates with amemory controller of the solid state drive. Determining the failure caninvolve the host system receiving a message from the memory sub-systemthat indicates the failure exists and the message can be or include oneor more Asynchronous Event Notification (AEN) messages.

At operation 1020, the processing logic can instruct the memorysub-system to operate at a reduced capacity and to retain the storeddata of the storage structure. In one example, the storage structure canbe a file system and the processing device can configure the storagestructure based on the reduced capacity of the memory sub-system.

At operation 1030, the processing logic can receive a set of storageunits of the memory sub-system that are affected by the failure. In oneexample, the set of storage units includes a set of one or more logicalblocks (e.g., logical block addresses) that include data that isinaccessible. In another example, the set of storage units includes aset of one or more zones that include data that is inaccessible.

At operation 1040, the processing logic can recover data that was in theset of storage units affected by the failure. In one example, recoveringthe data involves receiving data recovered by the memory sub-systemusing parity data. In another example, recovering the data involvesreceiving data from a copy of the data on another host system. In eitherexample, the processing device can store the received data at a storagelocation that is in the memory sub-system or in another memorysub-system.

FIG. 11 is a flow chart of a method 1100 that is executed by a hostsystem to manage a reduction to the capacity of a memory sub-system,according to an embodiment. The method 1100 can be performed byprocessing logic that can include hardware (e.g., processing device,circuitry, dedicated logic, programmable logic, microcode, hardware of adevice, integrated circuit, etc.), software (e.g., instructions run orexecuted on a processing device), or a combination thereof. Althoughshown in a particular sequence or order, unless otherwise specified, theorder of the processes can be modified. Thus, the illustratedembodiments should be understood only as examples, and the illustratedprocesses can be performed in a different order, and some processes canbe performed in parallel. Additionally, one or more processes can beomitted in various embodiments. Thus, not all processes are required inevery embodiment. Other process flows are possible.

At operation 1110, the processing logic can receive an indication that astorage capacity of a memory sub-system is affected by a failure. Thereceiving can involve receiving a first message that indicates thefailure exists and receiving a second message that indicates a set ofstorage units affected by the failure. The first and second message canbe Asynchronous Event Notification (AEN) messages. The memory sub-systemincludes memory cells that store multiple bits per cell and can storedata of a storage structure. In one example, the memory sub-system canbe a solid state drive (SSD) and the host system executes a devicedriver that communicates with a memory controller of the solid statedrive. In one example, the processing device can configure the storagestructure (e.g., file system) based on the reduced capacity of thememory sub-system.

At operation 1120, the processing logic can instruct the memorysub-system to operate at a reduced capacity. The reduced capacity can bethe result of reducing the quantity of bits stored per memory cell ofthe memory sub-system. In one example, the memory cells storing multiplebits per cell can be quad-level cells and instructing the memorysub-system to operate at the reduced capacity causes the quad-levelcells to downshift to triple-level cells.

At operation 1130, the processing logic can receive an indication thatthe memory sub-system includes data in excess of the reduced capacity.This can occur when the memory sub-system is at or is close to fillingup the capacity when the failure is detected. The memory sub-system canbe able to recover data that is inaccessible (e.g., lost) but does nothave a location to store the recovered data.

At operation 1140, the processing logic can provide a storage locationto the memory sub-system. The storage location can be external to thememory sub-system and large enough to store the recovered data.

At operation 1150, the processing logic can enable the memory sub-systemto store the data of the storage structure at the storage location.Enabling the memory sub-system to store the data can involve the hostsystem enabling the memory sub-system to transmit the data using directmemory access (DMA). In one example, the host system can receive anindication that the storage capacity of the memory sub-system isaffected by an additional failure and can instruct the memory sub-systemto operate at a further reduced capacity. The further reduced capacitycan reduce the quantity of bits stored per memory cell to a single bitper memory cell.

FIG. 12 illustrates an example machine of a computer system 1200 withinwhich a set of instructions, for causing the machine to perform any oneor more of the methodologies discussed herein, can be executed. In someembodiments, the computer system 1200 can correspond to a host system(e.g., the host system 120 of FIGS. 1-2) that includes, is coupled to,or utilizes a memory sub-system (e.g., memory sub-system 110 of FIG. 1).In alternative embodiments, the machine can be connected (e.g.,networked) to other machines in a LAN, an intranet, an extranet, and/orthe Internet. The machine can operate in the capacity of a server or aclient machine in client-server network environment, as a peer machinein a peer-to-peer (or distributed) network environment, or as a serveror a client machine in a cloud computing infrastructure or environment.

The machine can be a personal computer (PC), a tablet PC, a set-top box(STB), a Personal Digital Assistant (PDA), a cellular telephone, a webappliance, a server, a network router, a switch or bridge, or anymachine capable of executing a set of instructions (sequential orotherwise) that specify actions to be taken by that machine. Further,while a single machine is illustrated, the term “machine” shall also betaken to include any collection of machines that individually or jointlyexecute a set (or multiple sets) of instructions to perform any one ormore of the methodologies discussed herein.

The example computer system 1200 includes a processing device 1202, amain memory 1204 (e.g., read-only memory (ROM), flash memory, dynamicrandom access memory (DRAM) such as synchronous DRAM (SDRAM) or RambusDRAM (RDRAM), etc.), a static memory 1206 (e.g., flash memory, staticrandom access memory (SRAM), etc.), and a data storage system 1218,which communicate with each other via a bus 1230.

Processing device 1202 represents one or more general-purpose processingdevices such as a microprocessor, a central processing unit, or thelike. More particularly, the processing device can be a complexinstruction set computing (CISC) microprocessor, reduced instruction setcomputing (RISC) microprocessor, very long instruction word (VLIW)microprocessor, or a processor implementing other instruction sets, orprocessors implementing a combination of instruction sets. Processingdevice 1202 can also be one or more special-purpose processing devicessuch as an application specific integrated circuit (ASIC), a fieldprogrammable gate array (FPGA), a digital signal processor (DSP),network processor, or the like. The processing device 1202 is configuredto execute instructions 1226 for performing the operations and stepsdiscussed herein. The computer system 1200 can further include a networkinterface device 1208 to communicate over the network 1220.

The data storage system 1218 can include a machine-readable storagemedium 1224 (also known as a non-transitory computer-readable medium) onwhich is stored one or more sets of instructions 1226 or softwareembodying any one or more of the methodologies or functions describedherein. The instructions 1226 can also reside, completely or at leastpartially, within the main memory 1204 and/or within the processingdevice 1202 during execution thereof by the computer system 1200, themain memory 1204 and the processing device 1202 also constitutingmachine-readable storage media. The machine-readable storage medium1224, data storage system 1218, and/or main memory 1204 can correspondto the memory sub-system 110 of FIG. 1.

In one embodiment, the instructions 1226 include instructions toimplement functionality corresponding to the modules and components ofFIG. 5 (e.g., capacity management module 530). While themachine-readable storage medium 1224 is shown in an example embodimentto be a single medium, the term “non-transitory machine-readable storagemedium” should be taken to include a single medium or multiple mediathat store the one or more sets of instructions. The term“machine-readable storage medium” shall also be taken to include anymedium that is capable of storing or encoding a set of instructions forexecution by the machine and that cause the machine to perform any oneor more of the methodologies of the present disclosure. The term“machine-readable storage medium” shall accordingly be taken to include,but not be limited to, solid-state memories, optical media, and magneticmedia.

Some portions of the preceding detailed descriptions have been presentedin terms of algorithms and symbolic representations of operations ondata bits within a computer memory. These algorithmic descriptions andrepresentations are the ways used by those skilled in the dataprocessing arts to most effectively convey the substance of their workto others skilled in the art. An algorithm is here, and generally,conceived to be a self-consistent sequence of operations leading to adesired result. The operations are those requiring physicalmanipulations of physical quantities. Usually, though not necessarily,these quantities take the form of electrical or magnetic signals capableof being stored, combined, compared, and otherwise manipulated. It hasproven convenient at times, principally for reasons of common usage, torefer to these signals as bits, values, elements, symbols, characters,terms, numbers, or the like.

It should be borne in mind, however, that all of these and similar termsare to be associated with the appropriate physical quantities and aremerely convenient labels applied to these quantities. The presentdisclosure can refer to the action and processes of a computer system,or similar electronic computing device, that manipulates and transformsdata represented as physical (electronic) quantities within the computersystem's registers and memories into other data similarly represented asphysical quantities within the computer system memories or registers orother such information storage systems.

The present disclosure also relates to an apparatus for performing theoperations herein. This apparatus can be specially constructed for theintended purposes, or it can include a general purpose computerselectively activated or reconfigured by a computer program stored inthe computer. Such a computer program can be stored in a computerreadable storage medium, such as, but not limited to, any type of diskincluding floppy disks, optical disks, CD-ROMs, and magnetic-opticaldisks, read-only memories (ROMs), random access memories (RAMs), EPROMs,EEPROMs, magnetic or optical cards, or any type of media suitable forstoring electronic instructions, each coupled to a computer system bus.

The algorithms and displays presented herein are not inherently relatedto any particular computer or other apparatus. Various general purposesystems can be used with programs in accordance with the teachingsherein, or it can prove convenient to construct a more specializedapparatus to perform the method. The structure for a variety of thesesystems will appear as set forth in the description below. In addition,the present disclosure is not described with reference to any particularprogramming language. It will be appreciated that a variety ofprogramming languages can be used to implement the teachings of thedisclosure as described herein.

The present disclosure can be provided as a computer program product, orsoftware, that can include a machine-readable medium having storedthereon instructions, which can be used to program a computer system (orother electronic devices) to perform a process according to the presentdisclosure. A machine-readable medium includes any mechanism for storinginformation in a form readable by a machine (e.g., a computer). In someembodiments, a machine-readable (e.g., non-transitory computer-readable)medium includes a machine (e.g., a computer) readable storage mediumsuch as a read only memory (“ROM”), random access memory (“RAM”),magnetic disk storage media, optical storage media, flash memorycomponents, etc.

In the foregoing specification, embodiments of the disclosure have beendescribed with reference to specific example embodiments thereof. Itwill be evident that various modifications can be made thereto withoutdeparting from the broader spirit and scope of embodiments of thedisclosure as set forth in the following claims. The specification anddrawings are, accordingly, to be regarded in an illustrative senserather than a restrictive sense.

What is claimed is:
 1. A system comprising: a memory device; and aprocessing device, operatively coupled with the memory device, toperform operations comprising: configuring the memory device with azoned namespace comprising a plurality of zones; notifying a host systemof a failure associated with a zone of the plurality of zones, whereinthe failure affects stored data; receiving from the host system anindication to continue at a capacity that is reduced; recovering thestored data of the zone affected by the failure; and updating the set ofmemory devices to change the capacity to a reduced capacity.
 2. Thesystem of claim 1, wherein recovering the stored data comprises:accessing recovery data stored by the memory device, wherein therecovery data comprises parity data; and generating the stored dataaffected by the failure based on the recovery data.
 3. The system ofclaim 1, wherein the operations further comprise: locking the zoneassociated with the failure, wherein the locking comprises a write lockthat enables reads by the host system and disables writes by the hostsystem; providing the host system with data that is recovered inresponse to a read request for the zone; deleting all the data in thezone; and generating recovery data for the set of memory devices basedon the reduced capacity.
 4. The system of claim 1, wherein updating theset of memory devices to change the capacity to a reduced capacitycomprise updating the zoned namespace to deactivate the zone.
 5. Thesystem of claim 1, wherein the operations further comprise: indicatingto the host system that the capacity of the set of memory devices isunable to store recovered data; receiving from the host system a storagelocation to store the recovered data, wherein the storage location is ina main memory of the host system; and providing the recovered data forstorage at the storage location.
 6. The system of claim 1, wherein thenotifying comprises transmitting a message that indicates to the hostsystem a set of one or more zones of the plurality of memory devicesthat are affected by the failure.
 7. The system of claim 1, wherein thesystem comprises a solid state drive (SSD) and wherein the processingdevice is a memory controller of the solid state drive.
 8. A methodcomprising: configuring the memory device with a zoned namespacecomprising a plurality of zones; notifying a host system of a failureassociated with a zone of the plurality of zones, wherein the failureaffects stored data; receiving, by a processing device, from the hostsystem an indication to continue at a capacity that is reduced;recovering the stored data of the zone affected by the failure; andupdating, by the processing device, the set of memory devices to changethe capacity to a reduced capacity.
 9. The method of claim 8, whereinrecovering the stored data comprises: accessing recovery data stored bythe memory device, wherein the recovery data comprises parity data; andgenerating the stored data affected by the failure based on the recoverydata.
 10. The method of claim 8, further comprising: locking the zoneassociated with the failure, wherein the locking comprises a write lockthat enables reads by the host system and disables writes by the hostsystem; providing the host system with data that is recovered inresponse to a read request for the zone; deleting all the data in thezone; and generating recovery data for the set of memory devices basedon the reduced capacity.
 11. The method of claim 8, wherein updating theset of memory devices to change the capacity to a reduced capacitycomprise updating the zoned namespace to deactivate the zone.
 12. Themethod of claim 8, further comprising: indicating to the host systemthat the capacity of the set of memory devices is unable to storerecovered data; receiving from the host system a storage location tostore the recovered data, wherein the storage location is in a mainmemory of the host system; and providing the recovered data for storageat the storage location.
 13. The method of claim 8, wherein thenotifying comprises transmitting a message that indicates to the hostsystem a set of one or more zones of the plurality of memory devicesthat are affected by the failure.
 14. The method of claim 8, wherein theprocessing device is a memory controller of a solid state drive.
 15. Anon-transitory computer-readable medium storing instructions, which whenexecuted by a processing device, cause the processing device to performoperations comprising: configuring a set of memory devices with a zonednamespace comprising a first zone and a second zone; notifying a hostsystem of a plurality of failures associated with the plurality ofzones, wherein a first failure affects stored data of the first zone anda second failure affects stored data of the second zone; receiving fromthe host system an indication to continue at a capacity that is reducedafter each of the plurality of failures; recovering the stored data ofthe first zone that was affected by the failure; and updating the set ofmemory devices to change the capacity to a reduced capacity after eachof the plurality of failures.
 16. The non-transitory computer-readablemedium of claim 15, wherein recovering the stored data comprises:accessing recovery data stored by the set of memory devices, wherein therecovery data comprises parity data; and generating the stored data ofthe first zone based on the recovery data.
 17. The non-transitorycomputer-readable medium of claim 15, further comprising: locking thefirst zone, wherein the locking comprises a write lock that enablesreads by the host system and disables writes by the host system;providing the host system with data that is recovered in response to aread request for the first zone; deleting all the data in the firstzone; and generating recovery data for the set of memory devices basedon the reduced capacity.
 18. The non-transitory computer-readable mediumof claim 15, wherein updating the set of memory devices to change thecapacity to a reduced capacity comprise updating the zoned namespace todeactivate the first zone.
 19. The non-transitory computer-readablemedium of claim 15, wherein the operations further comprise: indicatingto the host system that the capacity of the set of memory devices isunable to store recovered data; receiving from the host system a storagelocation to store the recovered data, wherein the storage location is ina main memory of the host system; and providing the recovered data forstorage at the storage location.
 20. The non-transitorycomputer-readable medium of claim 15, wherein the notifying comprisestransmitting a message that indicates to the host system that the firstzone is affected by the first failure.